Runsheng Wang

Haoyi Zhang, Weijian Fan, Xiaohan Gao 高笑涵, Bingyang Liu, Runsheng Wang, Yibo Lin (2026). PANDA: An LLM-Enhanced Performance-Driven Analog Design Framework Bridging Design Intent and Layout Generation. In DAC'26.

Kairong Guo, Xiaohan Gao 高笑涵, Haoyi Zhang, Runsheng Wang, Ru Huang, Yibo Lin (2024). Exploring Better Intra-Cell Routability for Layout Synthesis of Multi-Row Standard Cells. In ASPDAC'25.

Xiaohan Gao 高笑涵, Haoyi Zhang, Bingyang Liu, Yibo Lin, Runsheng Wang, Ru Huang (2024). Joint Placement Optimization for Hierarchical Analog/Mixed-Signal Circuits. In ICCAD'24.

Bingyang Liu, Haoyi Zhang, Xiaohan Gao 高笑涵, Xiyuan Tang, Yibo Lin, Runsheng Wang, Ru Huang (2024). LayoutCopilot: LLM-Empowered Analog Layout Design towards Enhanced Human-Machine Interaction. In ASPDAC'25.

Bingyang Liu, Haoyi Zhang, Xiaohan Gao 高笑涵, Zichen Kong, Xiyuan Tang, Yibo Lin, Runsheng Wang, Ru Huang (2024). LayoutCopilot: An LLM-Powered Multiagent Collaborative Framework for Interactive Analog Layout Design. In TCAD'25.

Haoyi Zhang, Jiahao Song, Xiaohan Gao 高笑涵, Xiyuan Tang, Yibo Lin, Runsheng Wang, Ru Huang (2024). EasyACIM: An End-to-End Automated Analog CIM with Synthesizable Architecture and Agile Design Space Exploration. In DAC'24.

Xiaohan Gao 高笑涵, Haoyi Zhang, Zhu Pan, Yibo Lin, Runsheng Wang, Ru Huang (2024). Migrating Standard Cells for Multiple Drive Strengths by Routing Imitation. In ISEDA'24.

Xiaohan Gao 高笑涵, Haoyi Zhang, Siyuan Ye, Mingjie Liu, David Z. Pan, Linxiao Shen, Runsheng Wang, Yibo Lin, Ru Huang (2024). Post-Layout Simulation Driven Analog Circuit Sizing. In SciChina'24.

Haoyi Zhang, Xiaohan Gao 高笑涵, Zilong Shen, Jiahao Song, Xiaoxu Cheng, Xiyuan Tang, Yibo Lin, Runsheng Wang, Ru Huang (2024). SAGERoute 2.0: Hierarchical Analog and Mixed Signal Routing Considering Versatile Routing Scenarios. In DATE'24.

Haoyi Zhang, Xiaohan Gao 高笑涵, Haoyang Luo, Jiahao Song, Xiyuan Tang, Junhua Liu, Yibo Lin, Runsheng Wang, Ru Huang (2023). SAGERoute: Synergistic Analog Routing Considering Geometric and Electrical Constraints with Manual Design Compatibility. In DATE'23 (Best Paper Award).

Qipan Wang, Xiaohan Gao 高笑涵, Yibo Lin, Runsheng Wang, Ru Huang (2022). DeePEB: A Neural Partial Differential Equation Solver for Post Exposure Baking Simulation in Lithography. In ICCAD'22.

Yibo Lin, Xiaohan Gao 高笑涵, Haoyi Zhang, Runsheng Wang, Ru Huang (2022). Intelligent and Interactive Analog Layout Design Automation. In ICSICT'22.

Xiaohan Gao 高笑涵, Haoyi Zhang, Mingjie Liu, Linxiao Shen, David Z. Pan, Yibo Lin, Runsheng Wang, Ru Huang (2022). Interactive Analog Layout Editing with Instant Placement and Routing Legalization. In TCAD.